In recent years, dynamic load modulation (DLM) has seen increased interest as a method for enhancing the efficiency and/or linearity of power amplifiers (PAs). In DLM a tuneable impedance matching network is used to present a number of distinct or variable impedances to the transistor device of the PA in a controllable and repeatable way. For this purpose, a number of tuneable components such as varactor diodes, FETs, pin diodes or MEMS devices are used.
In its simplest form, dynamic load modulation can achieve high efficiency through simple reactive load tuning i.e. tuning the output matching network of a PA. However, this technique can suffer from a drop in the efficiency characteristics between peak and back-off output power, as well as offering limited output power and an impedance matching that is difficult to realise in practice. An additional issue encountered when using DLM is the losses of the tuneable matching network.
A simplified version of DLM has been introduced in which only the reactive part of the load is modulated (reactive-DLM). This is particularly interesting as it simplifies the output matching network design and minimises its losses. However, this technique suffers from a lower efficiency improvement capability, resulting in a trade-off between efficiency and the complexity of the network.